Pa linearization and Modeling Developer

Join our Team

About this opportunity:
Join us in advancing the country's digital agenda with 5G technology as a Power Amplifier linearization and modeling developer, you will enhance the development of our hardware products through requirement analysis, system and hardware design, integration, verification, simulations, tools design, and product documentation.

Job will include working with development of sub-system algorithms and combine it with machine learning capabilities. The work will be related to understanding signal processing and removal of signal distortion in Power Amplifiers and linearizing downlink chain within Ericsson Radios. This job will also include close collaboration with PA HW, DPD/Algorithm, Transmitter Design, Transmit observation receiver and Integration team at Ericsson.

What you will do:

• Selection and characterization of components for PA designs.
• Analyzing and optimizing PA and RF circuits.
• Work with RF link budgets and systemization of PA designs.
• Perform open and closed downlink loop testing during the project development life cycle.
• Some understanding of TX low power and Transmit observation receiver would be required.
• Collaborate with design teams to understand system architecture and link budgets for transmit chains, defining Power amplifier solutions that meet performance, cost, and manufacturability requirements for timely product deliveries.
• Design and develop high-power and wideband Power amplifier modules (Power ranges between 1W to 150 W for frequency bands between 600 MHz to 6000 MHz) and support their integration into radio systems with DPD linearization techniques.
• Modeling and characterization of linear and non-linear circuit elements in low and high-power RF amplifier modules.
• Understand how to develop and optimize DSP and ASIC/FPGA algorithms for areas such as Digital Predistortion (DPD), Crest Factor Reduction (CFR), Digital Filter Design etc.

The skills you bring:

• Candidates should have a minimum of 3-5 years of experience working directly in the development of Algorithms for ASIC and FPGAs with intermediate understanding of radio products (RF systemization, TRX and PA hardware design, integration of sub blocks within the TRX Downlink chain).
• Candidates must have graduated from the University in the year 2022 or later
• Good understanding of Data communication theory, Integrated circuits design and operation, RF electronics, RF system design and wireless and Mobile communication systems technology.
• Good knowledge of 3GPP specifications, especially in Radio performance characteristics.
• Knowledge of radio standards (2G, 3G,4G, GSM, WCDMA, LTE, NR, Wi-Fi, 5G)
• Good knowledge of RF test instruments and verification process for PA design.
• Material Device Physics knowledge for Wide Band and high-Power LDMOS/GaN/GaAs PA's.
• Python and MATLAB based scripting and automation experience is preferred.
• ASIC, FPGA and DSP theoretical and practical knowledge and experience.
• Innovative, adaptable, and collaborative.